Search notes:
x86 memory management
Linear address space: the memory that is addressable by the
CPU.
Two memory management facilities:
- segmentation (can be disabled)
- paging (optional)
Segmentation divides the linear address space into (protected) segments.
A particular byte in the linear address space is located by a logical address (aka far pointer).
A logical address consists of a segement selector and an offset.
Segmentation
Each segment has a
segment descriptor. A segment descriptor describes
- segment size
- access rights
- privilege level
- segment type
- address of segment's first byte in the linear address space (= segment's base address).
The segment selector »points« to the segment descriptor.
Base address + offset = addressed byte in linear address space.
Paging
Paging makes virtual memory possible.
With paging enabled, a segment is divided into pages. A page is usually 4 kb in size.
TODO
GDT = Global Descriptor Table