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make: wildcard

When make sees a (Bourne shell) wildcard (such as *, ~, ?, […] and [^…]) in a rule or a prerequisite, they're expanded to the names of the files that match the wildcard.
The following makefile tries to create an executable from all *.c files it find in the current directory. 
prog: *.c
	$(CC) -o $@ $^
Github repository about-Makefile, path: /wildcard/example-1/Makefile
Wildcards in commands are passed to the shell. So, these are not expanded when the makefile is run, but only when the command is run.

See also

$(wildcard …)

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